Ipx845 Miu Shiromine Bai Fengmiu Fhdhevc ((link)) (2025)

"Introducing the IPX845, a state-of-the-art media processor by MiU, featuring the Shiromine technology for superior video handling. The Bai Fengmiu (White Phoenix) edition of this processor supports FHD video output and leverages the efficient HEVC video compression standard, ensuring high-quality video playback and reduced storage needs. Ideal for advanced media devices, the IPX845 MiU Shiromine Bai Fengmiu FHD HEVC solution offers unparalleled performance and efficiency."

| Register | Offset | RW/RO | Description | |----------|--------|-------|-------------| | SHIROMINE_CTRL | 0x00 | RW | Enable/disable engine, select stream mode. | | SHIROMINE_STATUS | 0x04 | RO | Bit‑fields: BUSY , ERR_CORRUPT , ERR_OVERFLOW . | | SHIROMINE_SPS_ADDR | 0x08 | RW | Physical address where parsed SPS is stored (8 B). | | SHIROMINE_PPS_ADDR | 0x0C | RW | PPS location (8 B). | | SHIROMINE_VPS_ADDR | 0x10 | RW | VPS (for HEVC) location. | | SHIROMINE_BUF_BASE | 0x14 | RW | Base of input FIFO in DDR (must be 4‑KB aligned). | | SHIROMINE_BUF_SIZE | 0x18 | RW | Size (bytes) of input buffer (max 4 MiB). | | SHIROMINE_REORDER_EN | 0x1C | RW | Enable B‑frame reorder queue (1=on). | ipx845 miu shiromine bai fengmiu fhdhevc

: A Japanese adult media performer known for her roles in various high-profile studio productions. | | SHIROMINE_STATUS | 0x04 | RO |